Field of the Invention
The invention relates to a process for producing thin films of oxide ceramic.
CVD (chemical vapor deposition) processes are increasingly used to deposit thin films of oxide ceramic. In those processes, the starting materials which are used are organometallic precursors which decompose in a temperature range from 300 to 800.degree. C. on a hot substrate or wafer surface and are thus converted into the corresponding oxides. An oxidizing gas, e.g. O.sub.2, which burns the organic component of the precursors, is used for the oxidation of the organometallic precursors. Such oxidation processes usually proceed with the involvement of free radicals. Free-radical chain reactions frequently occur. Up to now, only oxidizing gases, e.g. O.sub.2 or its mixtures, e.g. O.sub.2 /N.sub.2 O, have been used. In the preparation of BST ((Ba, Sr)TiO.sub.3), for example, the precursors Sr(thd).sub.2 (tetraglyme), Ba(thd).sub.2 (tetraglyme) and (Ti(OiPr).sub.2 (thd).sub.2 are reacted at temperatures in a range from 450 to 650.degree. C. with O.sub.2 /N.sub.2 o as the oxidizing agent. However, due to the incomplete combustion of the carbon of the organometallic precursors, the deposited BST layer is only sufficiently pure at 500.degree. C. for acceptable electrical data to be measured.
In the case of BST, it has been found that good conformity of the deposition is achieved when deposition is carried out at lower temperatures, i.e. at temperatures below 500.degree. C., since the deposition proceeds primarily under kinetic control. In contrast, the deposition at above 500.degree. C. is increasingly diffusion controlled. This leads to reduced conformity, as can be seen from the diagrammatic view in FIG. 2.
Thin films of oxide ceramic are increasingly used in the production of semiconductor elements in microelectronics. In order to produce DRAMs (dynamic random access memory chips or DRAM chips) and FRAMs (ferroelectric random access memory chips or FRAM chips), it is possible, for example, to integrate paraelectric BST and ferroelectric SBT (SrBi.sub.2 Ta.sub.2 O.sub.9) as a dielectric in the storage capacitor. The storage capacitor is constructed according to the stack principle in which a barrier between a lower electrode (Pt electrode) and a plug is necessary. The barrier serves to prevent diffusion in both directions, i.e. the diffusion of oxygen or mobile components of the dielectric (e.g. BiO.sub.X (x=0-2.5)) in the direction of the plug as well as the diffusion of plug material through the platinum to the dielectric. In addition, the barrier can serve as a coupling agent for the platinum layer. A stack capacitor can, for example, be constructed as shown in FIG. 3, i.e. with a lower Pt electrode located on the contact plug, a superposed dielectric layer and an upper Pt electrode disposed above the dielectric layer.
Lower deposition temperatures, for example in the CVD process, than the deposition temperatures previously used (BST: 500-600.degree. C.; SBT: 500-700.degree. C.) offer the following advantages:
a) kinetically controlled deposition leads to better conformity of the ceramic layer, so that higher integratability is ensured; and PA1 b) the lower stressing of the oxygen barrier in the stack capacitor makes simpler barrier selection possible.